Hardware interrupts are used in modern computing systems for a variety of purposes including notifying processors of external events and facilitating inter-processor communication. When a hardware interrupt occurs, the processor that is assigned to handle the interrupt performs a context switch between the code it is then executing and the interrupt handling code, known as an interrupt service routine (“ISR”). When the processor finishes executing the ISR, it resumes execution of the code it was executing at the time of the interrupt.
In a virtualized computer system configured with multiple processors, hardware interrupt handling is distributed among the multiple processors. As a way to direct and arbitrate the flow of interrupts in such a system, programmable interrupt controllers are employed. In Intel® x86 based systems, programmable interrupt controllers known as Advanced Programmable Interrupt Controllers (APICs) are commonly used. The APIC architecture is described in IA-32 Intel Architecture Software Developer's Manual, Volume 3A: System Programming Guide, Part 1, Chapter 10, September 2010, the contents of which are incorporated by reference herein.
According to a current interrupt handling technique in virtualized computer systems, hardware interrupts are routed to the least busy processor, and the ISR is executed on that processor. A potential problem with this technique is that the identification of the least busy processor is made on a fairly coarse time scale, and the processor selected for executing the ISR may no longer be the least busy when the hardware interrupt actually occurs and is routed to that processor. In addition, a guest code may be running in the processor identified as the least busy, and the cost of handling an interrupt on such a processor is quite high (about 2000 to 3000 cycles). One solution to this problem would be to identify the least busy processor and processors running in guest context on a finer time scale, but performing such a process is computationally expensive and would add an undesirable amount of overhead if carried out too frequently.